Some personal computers (PC) employ a hard disk device as a secondary storage device. In such PCs, a technology is known for backing up data that has been stored in the hard disk device to prevent the data from becoming invalid because of some failure. For example, when act of changing data in the hard disk device is detected, a snapshot as a backup copy of the data before the change is taken and a log of changes made to the data is generated. Then, processing for taking a new snapshot, invalidating a log taken in the past before the new snapshot was taken, and generating a new log is repeated at every predetermined time (see, for example, US Patent Application Publication No. 2006/0224636). In case data becomes invalid due to some reason, the data can be restored by referring to the snapshot and the log.
In recent years, a capacity of a NAND flash memory as a nonvolatile semiconductor storage device has been increased dramatically. As a result, PCs including a memory system having the NAND flash memory as a secondary storage device have been put to practical use.
However, the technology disclosed in US Patent Application Publication No. 2006/0224636 cannot be applied to backup of data stored in such a personal computer having the NAND flash memory as the secondary storage device as in the case of backup of data stored in the personal computer having the hard disk device as the secondary storage device. This is because a multi-value memory technology that can store a plurality of data (multi-value data) equal to or larger than 2 bits in one memory cell is employed to increase the capacity of the NAND flash memory.
A memory cell configuring a multi-value memory has a field effect transistor structure having a stacked gate structure in which a gate insulating film, a floating gate electrode, an inter-gate insulating film, and a control gate electrode are stacked in order on a channel region and a plurality of threshold voltages can be set according to the number of electrons accumulated in the floating gate electrode. In order to make it possible to perform multi-value storage based on the plurality of threshold voltages, the distribution of a threshold voltage corresponding to one data needs to be made extremely narrow.
For example, as a multi-value memory that can store four values, there is a multi-value memory that includes a lower order page and a higher order page in one memory cell and stores 2 bits (four values) by writing 1-bit data in the respective pages. In a method of writing data in such a multi-value memory, after data is written in a lower order page of a first memory cell, data is written in a lower order page of a memory cell (a second memory cell) that is adjacent to the first memory cell. After data is written in this adjacent memory cell, data is written in a higher order page of the first memory cell (see, for example, JP-A 2004-192789 (KOKAI)).
However, in such a multi-value memory, a threshold voltage of the first memory cell in which data has been written earlier fluctuates because of a threshold voltage of the second memory cell in which the data is written later and that is adjacent to the first memory cell. Therefore, in the multi-value memory, it is likely that lower order page breakage occurs in which, if writing is suspended because of, for example, abnormal isolation of a power supply (hereinafter referred to as a short break) while data is being written in a higher order page of a certain memory cell, data in a lower order page in which the data is written earlier is also broken.
Therefore, in the personal computer having the NAND flash memory as the secondary storage device, for example, when the lower order page data breakage occurs because of a short break while the log is written in a higher order page of a certain memory cell as disclosed in US Patent Application Publication No. 2006/0224636, there is a problem in that, not only the data that is currently being written is broken, even data in a lower order page of the memory cell in which data is being currently written is broken and the data cannot be restored. In other words, there is a problem in that the method of taking backup using the technique disclosed in US Patent Publication No. 2006/0224636 for the personal computer including the memory system having the NAND flash memory as the secondary storage device is insufficient for restoring a state of the personal computer to a state before a short break.
In particular, when the memory system is started next time after a short break occurs during writing in a higher order page of a certain memory transistor, in the conventional method, a state of the memory system cannot be reset to a latest state before the short break occurs. Processing for restoring the memory system to the latest state when a short break occurs is not proposed.